Senior CAD Architect

Summary: The role of Senior CAD Architect focuses on driving automation and efficiency across end-to-end EDA workflows for analog, RF, and mixed-signal IC design. The role involves developing, integrating, and optimizing PDKs, verification runsets, and CAD automation frameworks across GaAs, SiGe, CMOS, BAW, and SAW technologies to accelerate design cycles and ensure first-silicon success. Position Overview: As the Technical Architect for EDA Automation, you will lead initiatives to streamline the entire IC design workflow—from schematic capture and simulation setup to verification, sign-off, packaging integration, and lab correlation. You will play a key role in enhancing productivity through robust automation frameworks, ensuring tool interoperability, and supporting tape out automation as a vital part of the overall design enablement strategy. This position blends technical leadership with hands-on engineering to empower design teams to deliver faster, more reliable silicon outcomes. Roles and Responsibilities: Architect, implement, and maintain comprehensive EDA workflows covering schematic capture, simulation automation (Virtuoso, Spectre/APS/SpectreRF, AMS Designer), and design verification. Develop and manage physical verification flows, including DRC, LVS, ERC, Antenna, and PEX, using industry-standard tools such as Calibre, ICV, and Pegasus. Automate and validate packaging interface workflows and data handoff processes to ensure seamless integration throughout the design lifecycle. Establish and maintain lab-to-simulation correlation pipelines to enable accurate post-silicon validation and performance matching. Customize and maintain foundry PDKs, multi-technology rule decks, and verification runsets across GaAs, SiGe, CMOS, BAW, and SAW process technologies. Implement domain-specific layout checks, including - RF: Symmetry, shielding, and path-length matching and Analog: Device matching, ratio checks, guard ring, and substrate tie rules. Integrate EM-aware parasitic extraction methodologies for GHz-class and precision analog designs to enhance simulation accuracy and design robustness. Automate simulation processes such as corner, Monte Carlo, noise, and linearity analyses to improve coverage, speed, and design quality. Develop dashboards and reporting tools to track sign-off status, verification coverage, and key performance indicators (KPIs). Mentor and guide engineers in SKILL, Tcl, Python, and CAD methodologies to build strong in-house automation capabilities. Qualifications: 12+ years of experience in CAD/EDA development and support for analog, RF, and mixed-signal IC design. Expert-level proficiency in physical verification tools such as Calibre (DRC/LVS/PEX) and/or ICV/Pegasus, with strong hands-on skills in Virtuoso, SKILL, and OpenAccess. Proven experience in developing, maintaining, and owning PDKs and verification runsets for foundry sign-off across multiple process nodes and technologies. Solid understanding of EM simulation tools such as EMX, Momentum, and HFSS, including their integration into design and sign-off flows. Demonstrated success in delivering scalable, maintainable, and production-grade EDA automation frameworks that enhance design productivity and reliability. Benefits: We want every Soliton member to grow to their highest potential. Our work environment helps individuals explore their interests and potential and reach out to the resources and people available at Soliton to realize them. Read more about what it’s like to work at Soliton. Soliton Employee Value Proposition Solitons choose their work hours as long as they take into