Cyient | senior physical design engineer
2 days ago
location: Bangalore / Hyderabad
Exp : 6 to 20 yrs.
Job Description
In-depth knowledge and hands-on experience on Netlist2 GDSII Implementation i.e. Floor planning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification, Chip finishing. Should have experience on Physical Design Methodologies and sub-micron technology of 16nm and lower technology nodes.
• Must have hands-on experience on Pn R Suite from Cadence & Synopsys (Innovus & ICC2)
• Experience in Static Timing Analysis (Prime Time - SI) , EM/IR-Drop analysis (PT-PX, Redhawk), Physical Verification (Calibre).
• Understanding the practical application of methodologies and Physical Design Tools, Flow Automation, and Improvements.
• Experience in SOC integration, Low Power and High-Speed Design and Advanced Physical Verification Techniques.
•Excellent Customer interaction, Communication, Teamwork skills and managing a team of 10+
• Should have experience in handling 5 M instance count , 1.5 GHz frequency designs.
• Should have experience on programming in Tcl/Tk/Perl to automate design process and improve efficiency.
Mandatory Skills
Python Java, Physical Design, Physical Verification, Design, Static Timing Analysis (STA), PNR (Inactive), Perl Programming, Team Management
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