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Senior Principal Engineer
2 months ago
Job Title: Senior Principal Engineer - Physical Design
Job Description
We are seeking a seasoned Senior Principal Engineer - Physical Design to join our team at Cyient. The ideal candidate will have in-depth knowledge and hands-on experience in Netlist2GDSII implementation, including floor planning, power grid design, placement, CTS, routing, STA, power integrity analysis, physical verification, and chip finishing.
Key Responsibilities:
- Hands-on experience with PnR Suite from Cadence & Synopsys (Innovus & ICC2)
- Experience in Static Timing Analysis (PrimeTime - SI), EM/IR-Drop analysis (PT-PX, Redhawk), Physical Verification (Calibre)
- Understanding of practical application of methodologies and Physical Design Tools, Flow Automation, and Improvements
- Experience in SOC integration, Low Power and High-Speed Design and Advanced Physical Verification Techniques
- Excellent Customer interaction, Communication, Teamwork skills and managing a team of 10+
Requirements:
- Experience in handling >5M instance count, 1.5GHz frequency designs
- Experience on programming in Tcl/Tk/Perl to automate design process and improve efficiency
- Python Java, Physical Design, Physical Verification, Design, Static Timing Analysis (STA), Perl Programming, Team Management