Lead-Physical Design

SALARY : 20LPA - 45LPA We are recruiting One of Our Indian Based MNC ClientClient - Indian Based MNC ClientType of Job - Full Time/Direct hire Type - HybridNotice Period - Not more than 45 Days with serving candidatesRole : Physical Design (PD) LeadExperience : 10+ YearsLocations : BangaloreMandatory Skills : Physical Design ExperienceJob Descriptions :-...

Responsibilities :  Develop and support automated physical design (PD) CAD flows, including floorplanning, placement, and routing optimization.  Customize and optimize physical design flows using industry-standard EDA tools (such as Synopsys ICC2, Cadence Innovus).  Collaborate with the design and CAD teams to improve PD workflows,...

Position Overview: We are looking for a highly experienced Physical Design Lead/Manager to join our team. This role is critical in driving the physical design of ASIC/SoC products for the automotive industry, ensuring that our designs meet performance, power, and area (PPA) targets while adhering to automotive standards. Key Responsibilities: Physical...

Responsibilities :  Minimum 8+ years of experience and with 0 - 30 Notice period  Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs.  Define and drive physical design strategies to meet aggressive performance, power, and area targets.  Perform efficient Clock planning and...

About the Company Bitsilica is a company that specializes in physical design implementation of large ASIC’s. Our mission is to provide cutting-edge solutions in the semiconductor industry while fostering a culture of innovation and collaboration. About the Role We are looking for a candidate with relevant work experience in physical design...

Hi, I am excited to announce that #Tessolve is hiring for Experienced candidates to join our dynamic team in #Bangalore and #Chennai! Responsibilities: Experience in leading & managing the physical design team to deliver high-quality physical design solutions for complex ASIC/SOCs. Experience in the entire physical design flow: floor planning,...

Responsibilities :  Minimum 8+ years of experience and with 0 - 30 Notice period  Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs.  Define and drive physical design strategies to meet aggressive performance, power, and area targets.  Perform efficient Clock planning and...

Wipro Hiring - Senior Physical Design Lead. Experience: 8+ Yrs PFB JD: In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. Should have experience on Physical Design Methodologies and sub-micron technology of 28nm and lower technology...

About the Company Wipro Hiring - Senior Physical Design Lead. About the Role Experience: 7+ Yrs PFB JD: In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. Should have experience on Physical Design Methodologies and sub-micron...

Wipro Hiring - Senior Physical Design Lead. Experience: 8+ Yrs PFB JD: In-depth knowledge and hands-on experience on Netlist2 GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. Should have experience on Physical Design Methodologies and sub-micron technology of 28nm and lower...

Wipro HiringPhysical Design Engineers / LeadsExperience : Min 5-20 Years.In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification.· Should have experience on Physical Design Methodologies and sub-micron technology of 28nm and lower technology...

Role : PD Lead Exp : 7+ years Location : Bangalore BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical Design Detailed knowledge of EDA tools and flows, Fusion compiler based RTL2GDS flow is desired Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep...

Role : PD Lead Exp : 7+ years Location : Bangalore BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical Design Detailed knowledge of EDA tools and flows, Fusion compiler based RTL2 GDS flow is desired Should be able to handle Full chip Pn R (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep...

Wipro HiringPhysical Design Engineers / LeadsExperience : Min 5-18 Years.In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification.· Should have experience on Physical Design Methodologies and sub-micron technology of 28nm and lower technology...

Wipro HiringPhysical Design Engineers / LeadsExperience : Min 5-20 Years.In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification.· Should have experience on Physical Design Methodologies and sub-micron technology of 28nm and lower technology...

Role : PD Lead Exp : 7+ years Location : Bangalore BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical Design Detailed knowledge of EDA tools and flows, Fusion compiler based RTL2GDS flow is desired Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep...

Role : PD Lead Exp : 7+ years Location : Bangalore BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical Design Detailed knowledge of EDA tools and flows, Fusion compiler based RTL2GDS flow is desired Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep...

Role : PD LeadExp : 7+ yearsLocation : BangaloreBE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical DesignDetailed knowledge of EDA tools and flows, Fusion compiler based RTL2GDS flow is desiredShould be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage designDeep understanding...

Role : PD LeadExp : 7+ yearsLocation : BangaloreBE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical DesignDetailed knowledge of EDA tools and flows, Fusion compiler based RTL2GDS flow is desiredShould be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage designDeep understanding...

Hello Folks, we at LTTS are looking for Physical design Lead role with 8+ years of experience.Deatiled JD is below as mentioned...Candidates with PnR – 8+ ’ experience• IP/Block level PnR activities from Netlist to GDS-II.• Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing, Timing closure(STA), signoff checks like FEV,...