STA Engineer

20 hours ago


Bangalore, India Sintegra Inc. Full time

Job Summary:

We are seeking a skilled STA Engineer with a strong background in Test and DFT architectures. The ideal candidate will have hands-on experience evaluating and writing high-quality timing constraints (SDCs) and performing thorough timing checks across complex digital designs.

Key Responsibilities:

  • Analyze and validate timing constraints (SDC) for DFT architectures.
  • Develop and maintain accurate SDC files to support timing closure.
  • Collaborate with design and test teams to ensure timing integrity across scan, BIST, and other test modes.
  • Perform timing checks and quality assessments to identify and resolve constraint-related issues.
  • Contribute to the development of best practices for DFT timing constraint generation and validation.

Required Qualifications:

  • Proven experience in STA with a focus on DFT/test modes.
  • Strong understanding of DFT architectures and their impact on timing.
  • Proficiency in writing and debugging SDCs.
  • Familiarity with industry-standard STA tools (e.g., PrimeTime, Tempus).
  • Excellent problem-solving and communication skills.

Preferred Qualifications:

  • Experience with scan insertion, ATPG, and BIST flows.
  • Knowledge of RTL design and synthesis flows.
  • Exposure to timing ECOs and constraint refinement.

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