STA CAD Engineer

Greetings from ACL DigitalWe are looking for STA CAD Engineers.Experience Level:4+ years of STA CADJob Description: STA CAD EngineerLocation: Hyderabad and BangaloreJob Description:Bachelor's degree in Electrical or Computer Engineering and 4+ years STA (Timing, Constrains)/CAD experience or Master's degree and 2+ years' experience • Excellent...

Job Title: STA Engineer Location: Banglaore/Hyderabad Employment Type: Full-time Industry: Semiconductors / VLSI / ASIC Design Job Summary: We are looking for a skilled and motivated STA Engineer to join our backend implementation team. The engineer will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, targeting...

Company Qualcomm India Private Limited Job Area Engineering Group Engineering Group Hardware Engineering General Summary As a leading technology innovator Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drives digital transformation to help create a smarter connected future for all As a Qualcomm Hardware Engineer...

Static Timing Analysis (STA) Engineer Job Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...

Role: STA Engineer Experience: 3+ Years Location: Bangalore (Onsite) Notice Period: Immediate to 30 Days / Serving Notice Key Responsibilities: Perform Static Timing Analysis (STA) at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off). Develop, validate, and maintain timing constraints (SDC files) for complex SoC and IP-level...

Static Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...

Summary: The Digital Physical Design Engineer is responsible for a physical implementation of IP, Subsystem or IC design.Job qualification:Experience range: 4-7 yearsShould be good in Synthesis Flow setup and Synthesis flows. Should have worked on Genus flows.Should be good in STA flow setup and STA flows. Should have worked in Tempus flows.  Should have...

Static Timing Analysis (STA) Engineer Job Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...

Job Description:STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs.Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus.Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation.Evaluate multiple timing methodologies/tools on different designs and technology...

Role: STA EngineerExperience: 3+ YearsLocation: Bangalore (Onsite)Notice Period: Immediate to 30 Days / Serving NoticeKey Responsibilities:Perform Static Timing Analysis (STA) at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off).Develop, validate, and maintain timing constraints (SDC files) for complex SoC and IP-level...