Lead Digital Design Engineer
2 weeks ago
Lead RTL Design Engineer (ASIC) Location: Chennai, Tamil Nadu Experience: 6 to 9 Years 6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Strong Domain Knowledge on RTL Design, implementation, and Timing analysis. Experience with RTL coding using Verilog/VHDL/System Verilog. Experience in micro-architecture & designing cores and ASICs. Exposure in scripting (Pearl/Python/TCL). Strong debugging capabilities at Synthesis, timing analysis & implementation Collaborate closely with cross-function team to research, design and implement performance, constraints and power management strategy for product roadmap. ACL Digital, part of the ALTEN Group, is a trusted AI-led, Digital & Systems Engineering Partner driving innovation by designing and building intelligent systems across the full technology stack — from chip to cloud. By integrating AI and data-powered solutions, we help enterprises accelerate digital transformation, optimize operations, and achieve scalable business outcomes.
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Lead RTL Design Engineer
6 days ago
Chennai, India ACL Digital Full timeLead RTL Design Engineer (ASIC)Location: Chennai, Tamil NaduExperience: 6 to 9 YearsJob Description6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable.Strong Domain Knowledge on RTL Design, implementation, and Timing analysis.Experience with RTL coding using Verilog/VHDL/System...
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Lead RTL Design Engineer
1 week ago
Chennai, India ACL Digital Full timeLead RTL Design Engineer (ASIC)Location: Chennai, Tamil NaduExperience: 6 to 9 YearsJob Description6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable.Strong Domain Knowledge on RTL Design, implementation, and Timing analysis.Experience with RTL coding using Verilog/VHDL/System...
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Lead RTL Design Engineer
4 days ago
Chennai, India ACL Digital Full timeLead RTL Design Engineer (ASIC)Location: Chennai, Tamil NaduExperience: 6 to 9 YearsJob Description6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable.Strong Domain Knowledge on RTL Design, implementation, and Timing analysis.Experience with RTL coding using Verilog/VHDL/System...
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Lead rtl design engineer
2 weeks ago
Chennai, India ACL Digital Full timeLead RTL Design Engineer (ASIC)Location: Chennai, Tamil NaduExperience: 6 to 9 YearsJob Description6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable.- Strong Domain Knowledge on RTL Design, implementation, and Timing analysis.- Experience with RTL coding using Verilog/VHDL/System...
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Lead RTL Design Engineer
1 week ago
Chennai, India ACL Digital Full timeLead RTL Design Engineer (ASIC) Location: Chennai, Tamil Nadu Experience: 6 to 9 Years Job Description 6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable. - Strong Domain Knowledge on RTL Design, implementation, and Timing analysis. - Experience with RTL coding using Verilog/VHDL/System...
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Lead RTL Design Engineer
1 week ago
Chennai, India ACL Digital Full timeLead RTL Design Engineer (ASIC) Location: Chennai, Tamil Nadu Experience: 6 to 9 Years Job Description 6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable. Strong Domain Knowledge on RTL Design, implementation, and Timing analysis. Experience with RTL coding using Verilog/VHDL/System...
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Lead RTL Design Engineer
4 days ago
Chennai, India ACL Digital Full timeLead RTL Design Engineer (ASIC) Location: Chennai, Tamil Nadu Experience: 6 to 9 Years Job Description 6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable. Strong Domain Knowledge on RTL Design, implementation, and Timing analysis. Experience with RTL coding using Verilog/VHDL/System...
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Lead RTL Design Engineer
24 hours ago
Chennai, India ACL Digital Full timeLead RTL Design Engineer (ASIC) Location: Chennai, Tamil Nadu Experience: 6 to 9 Years Job Description 6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable. Strong Domain Knowledge on RTL Design, implementation, and Timing analysis. Experience with RTL coding using Verilog/VHDL/System...
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Lead RTL Design Engineer
2 weeks ago
Chennai, Tamil Nadu, India, Tamil Nadu ACL Digital Full timeLead RTL Design Engineer (ASIC)Location: Chennai, Tamil NaduExperience: 6 to 9 YearsJob Description6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable.Strong Domain Knowledge on RTL Design, implementation, and Timing analysis.Experience with RTL coding using Verilog/VHDL/System...
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Design Verification Engineer
1 week ago
Chennai, India ACL Digital Full timeLead Design Verification Engineer Location: Chennai Experience: 5 to 10 Years Job Description: Develop and execute verification plans for complex SoC designs and IP blocks. Architect and implement testbenches using System Verilog and UVM/OVM methodologies. Perform RTL verification, simulation, and debugging. Collaborate with design, architecture, and...
