Lead RTL Design Engineer

Lead RTL Design Engineer (ASIC)Location: Chennai, Tamil NaduExperience: 6 to 9 YearsJob Description6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable.Strong Domain Knowledge on RTL Design, implementation, and Timing analysis.Experience with RTL coding using Verilog/VHDL/System...

Lead RTL Design Engineer (ASIC) Location: Chennai, Tamil Nadu Experience: 6 to 9 Years Job Description 6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable. Strong Domain Knowledge on RTL Design, implementation, and Timing analysis. Experience with RTL coding using Verilog/VHDL/System...

RTL Design Engineer (ASIC) Location: Chennai, Tamil Nadu Experience: 1 to 3 Years Job Description Job Role: Design and implement RTL for wireless modem IPs and SoC subsystems using Verilog/SystemVerilog. Develop micro-architecture specifications and deliver high-quality, synthesizable RTL. Integrate complex subsystems into SoC environments and support design...

RTL Design Engineer (ASIC)Location: Chennai, Tamil NaduExperience: 1 to 3 YearsJob DescriptionJob Role:Design and implement RTL for wireless modem IPs and SoC subsystems using Verilog/SystemVerilog.Develop micro-architecture specifications and deliver high-quality, synthesizable RTL.Integrate complex subsystems into SoC environments and support design...

Lead Design Verification Engineer Location: Chennai Experience: 5 to 10 Years Job Description: Develop and execute verification plans for complex SoC designs and IP blocks. Architect and implement testbenches using System Verilog and UVM/OVM methodologies. Perform RTL verification, simulation, and debugging. Collaborate with design, architecture, and...

Lead Design Verification Engineer Location: Chennai Experience: 5 to 10 Years Job Description: Develop and execute verification plans for complex SoC designs and IP blocks. Architect and implement testbenches using System Verilog and UVM/OVM methodologies. Perform RTL verification, simulation, and debugging. Collaborate with design, architecture, and...

Lead Design Verification EngineerLocation: ChennaiExperience: 5 to 10 YearsJob Description:Develop and execute verification plans for complex SoC designs and IP blocks.Architect and implement testbenches using System Verilog and UVM/OVM methodologies.Perform RTL verification, simulation, and debugging.Collaborate with design, architecture, and software teams...

Company Qualcomm India Private Limited Job Area Engineering Group Engineering Group Hardware Engineering General Summary Should have knowledge of AMBA protocols - AXI AHB APB SoC clocking reset debug architecture and peripherals like USB PCIE and SDCC Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in...

Title Design for Testability DFT Location Bangaluru Chennai Exp Minimum 3 year s of experience Roles Responsibilities Bachelor s degree in computer science Electronics Engineering or related fields and 6 years of related professional experience Thorough knowledge on various DFT Test architecture solutions and should be involved in DFT-Architecture definition...

Company Qualcomm India Private Limited Job Area Engineering Group Engineering Group Hardware Engineering General Summary As a leading technology innovator Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drives digital transformation to help create a smarter connected future for all As a Qualcomm Hardware Engineer...