UST | RTL Synthesis | hyderabad

Job Overview:We are seeking a highly skilled Senior RTL Synthesis Engineer to join our team at UST. In this role, you will be responsible for leading the development and implementation of advanced digital design techniques using RTL synthesis tools.Key Responsibilities:Lead the development and implementation of advanced digital design techniques using RTL...

Hi All,JD:-· Engineering Graduates with MS/MTech/ME (EE/CS/EC) with 5 years or BTech/BS/BE(EE/CS/EC) with 7years in VLSI industry· Hands on experience with RTL Synthesis, STA, Formal verification, and DFT are required; for DFT, expect at least minimum understanding of clocking and reset to scan logic· Must have recent 2-3 years of experience using...

Hi All, JD:- · Engineering Graduates with MS/MTech/ME (EE/CS/EC) with 5 years or BTech/BS/BE(EE/CS/EC) with 7years in VLSI industry · Hands on experience with RTL Synthesis, STA, Formal verification, and DFT are required; for DFT, expect at least minimum understanding of clocking and reset to scan logic · Must have recent 2-3 years of experience using...

UST Seeks Experienced RTL Synthesis ExpertWe are looking for a seasoned RTL synthesis professional to join our team at UST. The ideal candidate will have extensive experience in RTL design, analysis, and optimization using industry-leading tools.About the Role:Design, implement, and verify complex digital circuits using RTL synthesis techniques.Collaborate...

Hi All,JD:-· Engineering Graduates with MS/MTech/ME (EE/CS/EC) with 5 years or BTech/BS/BE(EE/CS/EC) with 7years in VLSI industry· Hands on experience with RTL Synthesis, STA, Formal verification, and DFT are required; for DFT, expect at least minimum understanding of clocking and reset to scan logic· Must have recent 2-3 years of experience using...

Hi All, JD:- · Engineering Graduates with MS/MTech/ME (EE/CS/EC) with 5 years or BTech/BS/BE(EE/CS/EC) with 7years in VLSI industry · Hands on experience with RTL Synthesis, STA, Formal verification, and DFT are required; for DFT, expect at least minimum understanding of clocking and reset to scan logic · Must have recent 2-3 years of experience using...

Hi All,JD:-· Engineering Graduates with MS/MTech/ME (EE/CS/EC) with 5 years or BTech/BS/BE(EE/CS/EC) with 7years in VLSI industry· Hands on experience with RTL Synthesis, STA, Formal verification, and DFT are required; for DFT, expect at least minimum understanding of clocking and reset to scan logic· Must have recent 2-3 years of experience using...

Hi All,JD:-· Engineering Graduates with MS/MTech/ME (EE/CS/EC) with 5 years or BTech/BS/BE(EE/CS/EC) with 7years in VLSI industry· Hands on experience with RTL Synthesis, STA, Formal verification, and DFT are required; for DFT, expect at least minimum understanding of clocking and reset to scan logic· Must have recent 2-3 years of experience using...

Hi All, JD:- · Engineering Graduates with MS/MTech/ME (EE/CS/EC) with 5 years or BTech/BS/BE(EE/CS/EC) with 7years in VLSI industry · Hands on experience with RTL Synthesis, STA, Formal verification, and DFT are required; for DFT, expect at least minimum understanding of clocking and reset to scan logic · Must have recent 2-3 years of experience...

About the RoleWe are seeking a skilled FPGA validation engineer to join our team in Hyderabad.Job DescriptionThis role involves working with PCIe 4/5, DDR 4/5 or USB3 technologies and requires hands-on experience with DSO and Logic Analyzers.The ideal candidate will have board-level debugging knowledge and be proficient in embedded C and RTL coding....

Hi All,We have some requirementsFPGA Validation-HyderabadJD: - FPGA validation engineers with experience in PCIe 4/5, DDR 4/5 or USB3-Hands on experience working with DSO and Logic Analyzers-Leads and senior members need board level debugging knowledge-Some of the team members should be proficient with embedded c and RTL coding.-Basic knowledge on ARM...

Hi All,We have some requirements FPGA Validation-Hyderabad JD: -FPGA validation engineers with experience in PCIe 4/5, DDR 4/5 or USB3-Hands on experience working with DSO and Logic Analyzers-Leads and senior members need board level debugging knowledge-Some of the team members should be proficient with embedded c and RTL coding.-Basic knowledge on ARM...

Hi All, We have some requirements FPGA Validation-Hyderabad JD: -FPGA validation engineers with experience in PCIe 4/5, DDR 4/5 or USB3 -Hands on experience working with DSO and Logic Analyzers -Leads and senior members need board level debugging knowledge -Some of the team members should be proficient with embedded c and RTL coding. -Basic knowledge...

Who we are: UST is a certified Workday partner, and we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 35,000 employees in 30 countries, we build for boundless impact—touching billions of lives in...

We are looking for ASIC RTL Design Lead for Hyderabad location who can join us in an immediate basis with below skills & responsibilities: Total Years of Experience 10+Yrs Hands on RTL Design using verilog SoC and Subsystem integration, Pheripherals like PCIE, Ethernet and USB Integration Front end flow environment bringup Strong in the Flows, Lint,...

RTL Design Engineers at Hyderabad We need experienced engineers to work on cutting edge technology and with complex functionality. Skills: Overall 3+ years industry experience with 2+ years in RTL Design and SoC Integration. Proven hands-on experience with RTL design for IP, the subsystem for ASIC. Hands-on experience with SoC integration issues like...

We are looking for ASIC RTL Design Lead for Hyderabad location who can join us in an immediate basis with below skills & responsibilities:Total Years of Experience 10+YrsHands on RTL Design using verilogSoC and Subsystem integration, Pheripherals like PCIE, Ethernet and USB IntegrationFront end flow environment bringupStrong in the Flows, Lint, CDC,...

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad A US based well-funded product-based startup looking for Highly talented ASIC / RTL / Logic Design Engineers for the following roles.ResponsibilitiesPrincipal / Senior Staff SoC/Chiplet RTL Integration DesignerResponsibilities...

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / HyderabadA US based well-funded product-based startup looking for Highly talented ASIC / RTL / Logic Design Engineers for the following roles.ResponsibilitiesPrincipal / Senior Staff So C/Chiplet RTL Integration DesignerResponsibilities...

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / HyderabadA US based well-funded product-based startup looking for Highly talented ASIC / RTL / Logic Design Engineers for the following roles.ResponsibilitiesPrincipal / Senior Staff SoC/Chiplet RTL Integration DesignerResponsibilities...