ASIC RTL Design Engineer
2 weeks ago
Looking for your next big challenge in ASIC Design?We're hiring ASIC Design Engineers with 8–15 years of experience to join our team in HyderabadIf you have expertise in RTL design, Verilog coding, SoC integration, synthesis, timing closure, and have completed at least one tape-out cycle, we'd love to connect with you.Location: HyderabadExperience: 8–15 YearsApply now or reach out directly
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Senior ASIC RTL Designer
4 weeks ago
Hyderabad, India Eximietas Design Full timePosition: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ yearsDesign and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks.Create micro-architecture specs and ensure designs meet performance, power, and area targets.Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...
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Senior ASIC RTL Designer
1 week ago
hyderabad, India Eximietas Design Full timePosition: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ yearsDesign and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks.Create micro-architecture specs and ensure designs meet performance, power, and area targets.Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...
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Senior ASIC RTL Designer
4 weeks ago
Hyderabad, India Eximietas Design Full timePosition: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ years Design and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks. Create micro-architecture specs and ensure designs meet performance, power, and area targets. Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...
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Senior ASIC RTL Designer
4 days ago
Hyderabad, India Eximietas Design Full timePosition: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ years Design and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks. Create micro-architecture specs and ensure designs meet performance, power, and area targets. Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...
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Senior ASIC RTL Designer
5 days ago
hyderabad, India Eximietas Design Full timePosition: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ years Design and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks. Create micro-architecture specs and ensure designs meet performance, power, and area targets. Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...
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Senior ASIC RTL Designer
1 week ago
Hyderabad, Telangana, India Eximietas Design Full time ₹ 20,00,000 - ₹ 25,00,000 per yearPosition: ASIC RTL Design EngineerLocation: Bangalore / HyderabadExperience: 6+ yearsDesign and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks.Create micro-architecture specs and ensure designs meet performance, power, and area targets.Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...
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Senior ASIC RTL Designer
4 weeks ago
Hyderabad, India Eximietas Design Full timePosition: ASIC RTL Design EngineerLocation: Bangalore / HyderabadExperience: 6+ years- Design and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks.- Create micro-architecture specs and ensure designs meet performance, power, and area targets.- Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...
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Senior asic rtl designer
3 weeks ago
Hyderabad, India Eximietas Design Full timePosition: ASIC RTL Design EngineerLocation: Bangalore / HyderabadExperience: 6+ years- Design and develop synthesizable RTL using Verilog/System Verilog for complex ASIC/So C blocks.- Create micro-architecture specs and ensure designs meet performance, power, and area targets.- Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and...
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Senior ASIC RTL Designer
2 weeks ago
Hyderabad, Telangana, India, Telangana Eximietas Design Full timePosition: ASIC RTL Design Engineer Location: Bangalore / Hyderabad Experience: 6+ yearsDesign and develop synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks.Create micro-architecture specs and ensure designs meet performance, power, and area targets.Own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT...
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ASIC SOC RTL Design Lead
2 weeks ago
Hyderabad, India Eximietas Design Full timeHi All,Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains.We are Hiring: ASIC SOC RTL Design Leads/Architect.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already...