Staff Design Verification Engineer: DDR Focused
1 day ago
We are looking for exceptional talent and leadership to join , the world’s first company developing Agentic Silicon for powering the future of AI. Founded in 2023, our team consists of 90+ highly skilled engineers from leading companies such as Intel, Marvell, Nvidia, Qualcomm, Cisco, AMD, Apple etc. Staff Design Verification Engineer: DDR Focused In this role you will be working on Memory Sub-system block for an advanced high performance server class AI and compute design. The task list includes, but is not limited to, testplan development, env development, checker/scoreboard development, test execution and analysis at sub-system, chiplet and multi-chiplet level Partner with Architects and RTL Design team to grasp high-level system requirements and specifications. Develop the verification environment and reusable bus functional models, stimulus, checkers, assertions, trackers, and coverage metrics. Execute verification plans, including tasks such as design bring-up, setting up the DV environment, running regressions for feature validation, and debugging test failures. Bachelor’s or Master’s degree in Electrical/Electronics Engineering/Science with 5 to 10years of relevant experience Must have strong expertise with SV/UVM methodology and/or C/C++ based verification with 5yrs+ hands-on experience in IP/sub-system and/or SoC level verification Hands on experience and expertise with industry standard verification tools for simulation and debug (Questa/VCS, Visualizer) Experience using random stimulus along with functional coverage and assertion-based verification methodologies a must. Experience in development of UVM based verification environments from scratch. Hands on expertise and protocol knowledge DDR protocols, memory controllers, DDR compliance testing Mining The Knowledge Community"
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Bangalore, India Mulya Technologies Full timeBangalore Founded in 2023,by Industry veterans HQ in California,US Location: Greater Bengaluru Area Company Description We are looking for exceptional talent and leadership to join , the world’s first company developing Agentic Silicon for powering the future of AI. Founded in 2023, our team consists of 90+ highly skilled engineers from leading companies...
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Staff Design Verification Engineer: DDR Focused
22 hours ago
bangalore, India Mulya Technologies Full timeBangaloreFounded in 2023,by Industry veterans HQ in California,US Location: Greater Bengaluru Area Company DescriptionWe are looking for exceptional talent and leadership to join , the world’s first company developing Agentic Silicon for powering the future of AI.Founded in 2023, our team consists of 90+ highly skilled engineers from leading companies such...
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Bangalore, India Mulya Technologies Full timeBangalore Founded in 2023,by Industry veterans HQ in California,US Location: Greater Bengaluru Area Company Description We are looking for exceptional talent and leadership to join , the world’s first company developing Agentic Silicon for powering the future of AI. Founded in 2023, our team consists of 90+ highly skilled engineers from leading companies...
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Principal Design Verification Engineer: DDR Focused
18 hours ago
bangalore, India Mulya Technologies Full timeBangaloreFounded in 2023,by Industry veterans HQ in California,US Location: Greater Bengaluru Area Company DescriptionWe are looking for exceptional talent and leadership to join , the world’s first company developing Agentic Silicon for powering the future of AI.Founded in 2023, our team consists of 90+ highly skilled engineers from leading companies such...
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Design Verification Engineer
3 days ago
Bangalore, India ACL Digital Full timeDDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols. Testbench Development: Develop and implement scalable, reusable, and efficient verification environments and testbenches for DDR designs using SystemVerilog, UVM (Universal...
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Design Verification Engineer
3 weeks ago
Bangalore Urban, India ACL Digital Full timeDDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols. Testbench Development: Develop and implement scalable, reusable, and efficient verification environments and testbenches for DDR designs using SystemVerilog, UVM (Universal...
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Design Verification Engineer
4 weeks ago
Bangalore Urban, India ACL Digital Full timeDDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols.Testbench Development: Develop and implement scalable, reusable, and efficient verification environments and testbenches for DDR designs using SystemVerilog, UVM (Universal...
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Senior Design Verification Engineer
1 day ago
Bangalore, India Eximietas Design Full timeWe’re Hiring – Lead Design Verification Engineer @ Eximietas Design! Position: Lead Design Verification Engineer Experience: 7+ Years Locations: Bangalore / Ahmedabad / Pune / Hyderabad Key Skills: Proven experience in Design Verification using SystemVerilog and UVM Strong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR, USB,...
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Senior Design Verification Engineer
18 hours ago
bangalore, India Eximietas Design Full timeWe’re Hiring – Lead Design Verification Engineer @ Eximietas Design! Position: Lead Design Verification EngineerExperience: 7+ YearsLocations: Bangalore / Ahmedabad / Pune / HyderabadKey Skills:Proven experience in Design Verification using SystemVerilog and UVMStrong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR, USB, NVMe,...
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Senior Design Verification Engineer
21 hours ago
Bangalore Division, India Eximietas Design Full timeWe’re Hiring – Lead Design Verification Engineer @ Eximietas Design! Position: Lead Design Verification Engineer Experience: 7+ Years Locations: Bangalore / Ahmedabad / Pune / Hyderabad Key Skills: Proven experience in Design Verification using SystemVerilog and UVM Strong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR, USB,...
