Design Verification Engineer
3 days ago
DDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols. Testbench Development: Develop and implement scalable, reusable, and efficient verification environments and testbenches for DDR designs using SystemVerilog, UVM (Universal Verification Methodology), and other industry-standard verification methodologies. Protocol Compliance: Ensure the DDR design meets protocol specifications, including command, data, and clock synchronization, read/write cycles, burst transfers, refresh cycles, error handling, and power management. Verification Plan Creation: Develop detailed verification plans based on DDR specifications and requirements, ensuring full coverage of corner cases, timing, and protocol validation. Simulation & Debugging: Run simulations and debug issues using tools such as Questa, VCS, or ModelSim, applying advanced debugging techniques such as waveform analysis, assertion-based verification, and code coverage. Regression Testing: Set up and manage regression testing for DDR functionality to ensure continuous validation and early detection of design issues. Verification Coverage: Achieve high functional and protocol coverage, ensuring that critical aspects of DDR design, including timing constraints, corner cases, and failure scenarios, are thoroughly verified. Formal Verification: Implement formal verification techniques to validate key components of the DDR design, ensuring correctness in timing and data flow, and verifying the most critical operations.
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Senior Design Verification Engineer
1 day ago
Bangalore, India Eximietas Design Full timeWe’re Hiring – Lead Design Verification Engineer @ Eximietas Design! Position: Lead Design Verification Engineer Experience: 7+ Years Locations: Bangalore / Ahmedabad / Pune / Hyderabad Key Skills: Proven experience in Design Verification using SystemVerilog and UVM Strong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR, USB,...
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Senior Design Verification Engineer
18 hours ago
bangalore, India Eximietas Design Full timeWe’re Hiring – Lead Design Verification Engineer @ Eximietas Design! Position: Lead Design Verification EngineerExperience: 7+ YearsLocations: Bangalore / Ahmedabad / Pune / HyderabadKey Skills:Proven experience in Design Verification using SystemVerilog and UVMStrong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR, USB, NVMe,...
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Senior Design Verification Engineer
21 hours ago
Bangalore Division, India Eximietas Design Full timeWe’re Hiring – Lead Design Verification Engineer @ Eximietas Design! Position: Lead Design Verification Engineer Experience: 7+ Years Locations: Bangalore / Ahmedabad / Pune / Hyderabad Key Skills: Proven experience in Design Verification using SystemVerilog and UVM Strong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR, USB,...
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Senior Design Verification Engineer
20 hours ago
bangalore district, India Eximietas Design Full timeWe’re Hiring – Lead Design Verification Engineer @ Eximietas Design! Position: Lead Design Verification Engineer Experience: 7+ Years Locations: Bangalore / Ahmedabad / Pune / Hyderabad Key Skills: Proven experience in Design Verification using SystemVerilog and UVM Strong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR, USB,...
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Senior Design Verification Architect
3 days ago
bangalore, India Eximietas Design Full timeEximietas Design Hiring Senior Design Verification Architects/ Sr. Manger. Experience: 8+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: # Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. # Develop and...
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Senior Design Verification Architect
4 days ago
bangalore, India Eximietas Design Full timeEximietas Design Hiring Senior Design Verification Architects/ Sr. Manger.Experience: 8+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:# Lead SoC Design Verification efforts for complex projects, ensuringsuccessful execution of verification plans.# Develop and...
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Verification Lead Design Engineer
3 days ago
bangalore, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
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Senior Design Verification Lead
3 days ago
Bangalore, India Eximietas Design Full timeEximietas Design Hiring Senior Design Verification (PCIE) Engineers / Leads / Managers. Experience: 8+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: # Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. #...
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Senior Design Verification Lead
5 days ago
bangalore, India Eximietas Design Full timeEximietas Design Hiring Senior Design Verification (PCIE) Engineers / Leads / Managers.Experience: 8+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:# Lead SoC Design Verification efforts for complex projects, ensuringsuccessful execution of verification plans.# Develop...
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Senior Design Verification Architect
2 days ago
bangalore, India Eximietas Design Full timeHi All, Eximietas Design Hiring Senior SoC Design Verification Architects / Sr. Manager. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: # Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans....
