Master Circuit Designer

4 days ago

Thāne, Maharashtra, India beBeeLayout Full time ₹ 1,20,00,000 - ₹ 1,80,00,000

Memory Layout Engineer

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  • Develop memory compilers layouts and memory Fast Cache instances layouts for our next generation Cores to achieve outstanding Power, Performance, and Area (PPA).
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Key Responsibilities:

  • Design and implement memory compilers and Fast Cache instances layouts for cutting-edge cores.
  • Collaborate with cross-functional teams to ensure layout meets performance, power, and area requirements.
  • Develop expertise in CMOS transistors and logic design principles.
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Requirements:

  • Hold a graduate or postgraduate degree in Electronic Engineering or equivalent field.
  • Proven understanding of CMOS transistors and their behavior.
  • Demonstrate knowledge of power versus performance versus area trade-offs in typical CMOS design.
  • Possess excellent engineering demeanor and passion for circuit layouts.
  • Excellent interpersonal skills are essential for effective collaboration.
  • Ability to create high-quality design rule-driven layouts.
  • Review schematics and propose changes based on layout implications.
  • Explore floor planning options and propose improvements.
  • Minimum 5 years of experience in SRAM/memory layouts creation and backend verifications including EMIR analysis.
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Nice To Have Skills and Experience:

  • Basic understanding of scripting languages such as Perl/Python.
  • Experience working on Cadence or Synopsys flows.
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Job Summary:

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We are seeking a skilled Memory Layout Engineer to join our team. The ideal candidate will have strong knowledge of CMOS transistors, logic design, and experience in SRAM/memory layouts creation and backend verifications. If you are passionate about circuit layouts and possess excellent interpersonal skills, we encourage you to apply.

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