Senior DFT Architect
4 days ago
As a DFT Engineer, you will be responsible for developing and implementing Design for Testability architectures and methodologies for complex SoCs and ASICs. This includes designing and implementing ATPG, MBIST, and Scan Insertion processes, as well as generating, simulating, and verifying ATPG, MBIST, and LBIST patterns to ensure robust test coverage and design integrity.
Key Responsibilities:- Develop and implement DFT architectures and methodologies for complex SoCs and ASICs.
- Perform Automatic Test Pattern Generation (ATPG), Memory Built-In Self-Test (MBIST), and Scan Insertion processes.
- Generate, simulate, and verify ATPG, MBIST, and LBIST patterns to ensure robust test coverage and design integrity.
To succeed in this role, you will need to have a strong background in DFT methodologies, including ATPG, MBIST, and Scan Insertion, as well as excellent scripting and debugging skills. You should also be proficient in industry-standard EDA tools, such as Synopsys, Mentor Graphics, and Cadence.
A minimum of 3 years of hands-on experience in DFT is required, with a strong emphasis on debugging and scripting. You should also have a solid understanding of DFT architecture, ICL network, and STA constraints.
Additionally, you should be able to work effectively in a collaborative team environment and have excellent problem-solving skills. Familiarity with scripting languages, such as TCL, Perl, or Python, is also highly desirable.
What We Offer:This role offers the opportunity to work on complex and challenging projects, with a competitive salary and benefits package. You will also have access to ongoing training and professional development opportunities, as well as the chance to work with a talented and experienced team of engineers.
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