
Senior DFT Architect Position
2 weeks ago
The position involves the development and implementation of DFT architectures with a focus on MBIST for advanced SoCs. Key responsibilities include integrating MBIST IPs, generating test insertion and verification infrastructure.
This role requires strong analytical and problem-solving skills with the ability to work independently. It also demands proficient knowledge in tools such as Synopsys DFT Compiler, Tessent (Mentor), or equivalent.
Requirements:Bachelor's or Master's degree in Electronics or related field.
Minimum 7 years of hands-on experience in DFT with a strong focus on ATPG, SCAN, and MBIST.
Solid understanding of scan insertion, ATPG, boundary scan, and JTAG.
Experience with memory test algorithms, repair analysis, and pattern generation.
Familiarity with scripting languages (TCL, Perl, Python) for automation.
About the Role:
The ideal candidate will possess strong technical expertise in DFT and excellent collaboration skills. They will be able to integrate with various teams throughout the design cycle.
This is an exciting opportunity for professionals seeking to contribute to cutting-edge semiconductor design and testing solutions.
Key performance indicators will include high coverage and test quality in scan and MBIST, as well as successful silicon bring-up and yield improvement activities post-silicon.
Benefits:This company prioritizes diversity and inclusion, aiming to eliminate any biases or barriers that may hinder personal or professional growth.
Strong benefits package includes competitive compensation, opportunities for growth, and an electric work environment that fosters innovation and creativity.
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