
Distinguished Verification Engineer
1 day ago
This role involves designing and executing verification plans for new and existing features in graphics processor IP.
- Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified.
- Develop test plan documentation that accounts for interactions with other features, the hardware, firmware, and software driver use cases.
- Estimate the time required to write new feature tests and any required changes to the test environment.
- Build directed and random verification tests.
- Debug test failures to determine the root cause and work with RTL and firmware engineers to resolve design defects and correct test issues.
Required Skills:
- Proficient in IP-level ASIC verification.
- Proficient in debugging firmware and RTL code using simulation tools.
- Experienced with UVM testbenches and working in Linux and Windows environments.
- Strong background in C++ language, preferably on Linux with exposure to Windows platform.
- Good understanding and hands-on experience in UVM concepts and SystemVerilog language.
- Scripting language experience: Perl, Ruby, Makefile, shell preferred.
Preferred Qualifications:
- Graphics pipeline knowledge.
- Developing UVM-based verification frameworks and testbenches, processes, and flows.
- Automating workflows in a distributed compute environment.
- Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process.
- Leadership or mentorship experience.
Academic Credentials:
- Bachelors or Masters degree in computer engineering/Electrical Engineering.
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