High-Level Designer Verification Position

2 days ago

Hyderabad Secunderabad Telangana, India beBeeVerification Full time ₹ 9,00,000 - ₹ 12,00,000

Job Title: Verification Engineer

As a Verification Engineer, you will play a critical role in the development of our products by designing and implementing verification plans to ensure the quality and reliability of our hardware and software components.

About the Job:

  • We are seeking an experienced Verification Engineer to join our team. The successful candidate will be responsible for collaborating with architects, hardware engineers, and firmware engineers to understand new features to be verified.
  • The ideal candidate will have proficient experience in IP level ASIC verification, debugging firmware and RTL code using simulation tools, and working with UVM testbenches.
  • The successful candidate will also have strong background in C++ language, preferably on Linux with exposure to Windows platform.
  • Additionally, they should have good understanding and hands-on experience in UVM concepts and SystemVerilog language, as well as good working knowledge of SystemC and TLM.
  • Bonus points if they have prior exposure to video codec systems or other multimedia solutions.

Key Responsibilities:

  1. Collaborate with architects, hardware engineers, and firmware engineers to understand new features to be verified.
  2. Design and implement verification plans to ensure quality and reliability of hardware and software components.
  3. Debug test failures to determine root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues.
  4. Review functional and code coverage metrics, modify or add tests or constrain random tests to meet coverage requirements.

Preferred Qualifications:

  • Proficient in UVM testbenches and working in Linux and Windows environment.
  • Experienced with Verilog, System Verilog, C, and C++.
  • Graphics pipeline knowledge.
  • Developing UVM based verification frameworks and testbenches, processes and flows.
  • Automating workflows in a distributed compute environment.
  • Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process.

Additional Information:

This is an exciting opportunity for an experienced Verification Engineer to join our team and contribute to the development of our innovative products.

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