
Silicon Verification Expert
4 days ago
- The ideal candidate has a proven track record in driving strategies and executing verification on high-performance IPs and/or SOC designs at the block and system levels.
Job Description:
- We are seeking an experienced engineer to lead our verification team and work closely with cross-functional teams to develop and implement verification strategies for high-performance IPs and/or SOC designs.
- The successful candidate will have experience in developing UVM/OVM and/or Verilog test benches and using simulation tools/debug environments such as Synopsys VCS, Cadence IES.
Required Skills and Qualifications
- Minimum 15 years of experience in technically leading a team and working with cross-functional teams, planning interlocks with dependent teams and mitigating risks.
- Strong understanding of state-of-the-art verification techniques, including assertion and metric-driven verification.
- Experience with FPGA programming and software is a plus.
- Experience with formal property checking tools such as Cadence (IEV), Jasper and Synopsys (Magellan / VC Formal) is a plus.
- Prior experience with silicon debug at the tester and board level is a plus.
- Bachelor's or Master's degree in computer engineering/Electrical Engineering.
Benefits
- This role offers the opportunity to work with cutting-edge technologies and contribute to the development of innovative solutions.
- Our team provides a collaborative and dynamic environment that fosters growth and professional development.
Others
- Preferred candidates will have experience with gate-level simulation, power-aware verification, reset verification, and contention checking.
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