
Senior ASIC Implementation Specialist
1 day ago
We are seeking a highly skilled professional to spearhead the development of complex SoC blocks or full-chip designs, focusing on performance, power, and area (PPA) optimization and signoff closure.
- Duties include:
- Implementing complex SoC blocks or full-chip designs using RTL-to-GDSII methodology
- Optimizing PPA to meet signoff closure requirements
- Maintaining and creating constraints for successful timing closure
- Ensuring seamless integration of DFT modes in STA timing closure
- Key Qualifications:
- 4+ years of experience in ASIC implementation
- Strong understanding of timing closure fundamentals
- Proven expertise in constraint creation and maintenance
- Familiarity with DFT modes in STA timing closure
What You Will Achieve:
As a seasoned specialist, you will play a pivotal role in driving innovation and excellence in the field of VLSI/ASIC design.
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