
Chief Core CPU Architect
4 days ago
Seeking a highly skilled technical leader to drive innovations in core CPU architecture, firmware/OS enablement, and performance tuning for next-generation SoCs used in automotive and edge computing platforms.
This role requires expertise in ARM-based CPU design, embedded firmware, low-level system software, and deep knowledge of CPU microarchitecture, cache/memory subsystems, power-performance optimization, and Linux kernel integration.
Responsibilities:- Architect core CPU software interfaces (firmware, BSP, drivers) aligned with ARM CPU microarchitecture features.
- Design and implement low-level firmware and kernel components for CPU initialization, exception handling, MMU setup, coherency, and memory management.
- Collaborate with CPU design and silicon teams on pipeline features, caches, coherency protocols, branch prediction, and power states.
- Lead Linux kernel and RTOS integration for CPU subsystems, focusing on scheduling, memory, and power-aware optimizations.
- Drive CPU power management strategies: clock gating, DVFS, retention states, idle states, and adaptive scaling.
- Perform CPU and memory subsystem performance profiling using simulators, emulators, JTAG, and hardware trace/debug tools.
- Define system-level performance/power KPIs and lead tuning across CPU, firmware, kernel, and device drivers.
- CPU Architecture: Expertise in ARMv8/v9 architecture, exception levels, MMU, caches, coherency protocols, ISA extensions, and PMU.
- Firmware & Kernel: Hands-on experience in firmware, Linux kernel internals, RTOS, and device drivers.
- Performance & Power: Ability in CPU pipeline analysis, memory subsystem tuning, DVFS, cpuidle/cpufreq frameworks, and power-performance tradeoff analysis.
- Debug & Bring-up: Experience in CPU bring-up, silicon validation, trace analyzers, emulators, JTAG, and kernel tracing tools.
- Programming: Proficiency in C/C++ and assembly (ARM), with Python/Shell for automation.
- I/O & Interconnects: Familiarity with PCIe, Ethernet, I²C, SPI, CAN, USB, and memory buses (DDR, LPDDR).
- Problem Solving: Strong ability to root-cause complex issues across CPU architecture, firmware, and OS layers.
- Contributions to open-source CPU enablement (Linux kernel, toolchains, firmware frameworks).
- Background in automotive, mobile SoCs, or Edge computing platforms with strict latency and performance KPIs.
- Technical leadership in CPU/SoC co-design projects involving hardware, firmware, and OS integration.
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