Design Validation Specialist

7 days ago

Bareilly, Uttar Pradesh, India beBeeVerification Full time ₹ 18,00,000 - ₹ 25,00,000
Job Description

We are seeking a skilled professional to join our team as a Design Verification Engineer. The primary responsibility of this role will be to ensure that the design meets all functional and performance requirements.

The successful candidate will have a strong background in digital design and verification, with experience in GLS, ZD/PAGLS/SDF/Scan dump verification, and UVM, System Verilog, and Digital Fundamentals.

The ideal candidate should have a good understanding of DDR families (LP/PC) and generations (DDR2/3/4/5), and bus protocols like AHB/AXI/ACE/ACE-Lite.

We are looking for a self-motivated individual who can work independently and as part of a team to deliver high-quality results.

Required Skills and Qualifications
  • GLS hands on experience in ZD/PAGLS/SDF/Scan dump verification.
  • Strong Debug, UVM, System Verilog and Digital Fundamentals
  • Able to debug Netlist functional failure.
  • Low Power Aware verification.
  • Timing Simulation failure, setup and hold violation fundamentals.
  • Scan dump verification.
  • Understanding Specs and Standards and developing relevant test plans.
  • Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved.
Benefits

This role offers a competitive salary and benefits package, including opportunities for career growth and professional development.

Others

We are an equal opportunities employer and welcome applications from diverse candidates.

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