STA Engineer: Timing Analysis Expert
2 weeks ago
Proxeleras cutting-edge technology and expertise in VLSI design have propelled the company to new heights, expanding its presence in the international market.
We are seeking a highly skilled Static Timing Analysis (STA) Engineer to join our team at our Bangalore or Hyderabad office. With a minimum of 4 years of experience in relevant fields, the ideal candidate will thrive in high-paced environments and contribute significantly to our next wave of technological advancements.
Key Responsibilities:
- Perform comprehensive STA for VLSI designs to ensure timing closure and integrity.
- Collaborate with the Physical Design team to meet design constraints and requirements.
- Develop and maintain scripts using Tcl, Perl, or Python for automation of analysis and reporting.
- Evaluate and implement Clock Domain Crossing techniques to ensure signal integrity and performance.
- Identify timing issues and propose corrective measures for timing closure.
- Provide technical support and guidance to junior engineers and other team members.
The successful candidate will possess a strong background in VLSI design and STA engineering, with expertise in Clock Domain Crossing techniques and considerations, as well as proficiency in Verilog and RTL Design. The estimated salary for this role is around ₹10-14 lakhs per annum, depending on location and experience.
What We Offer:
- A dynamic and challenging work environment that fosters growth and innovation.
- Ongoing training and development opportunities to enhance your skills and knowledge.
- A competitive salary package that recognizes your value and contributions.
- A collaborative and supportive team culture that values open communication and mutual respect.
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