Static Timing Analysis Expert
3 weeks ago
About the Role
We are seeking a highly skilled Static Timing Analysis Expert to join our team at Rambus. As a key member of our design implementation group, you will be responsible for owning static timing analysis at the full chip level for high speed mixed signal designs. Your expertise in multi-mode, multi-corner timing and power analysis using Primetime/Tempus will be instrumental in driving the success of our projects.
Key Responsibilities
- Complete ownership of static timing analysis for full chip level designs
- Experience with multi-mode, multi-corner timing and power analysis using Primetime/Tempus
- Responsible for integrating blocks and analog IPs for full chip timing analysis
- Good understanding of SDC constraints and ability to translate timing requirements into constraints
- Well aware of place and route methodologies and hands-on experience with timing convergence
Qualifications
- At least 10-12 years of experience, with 8 years focused on STA/Synthesis
- Involved in high speed design tape-outs and constraint development across modes
- Detailed knowledge of constraints and signoff closure methodology for STA and RTL2GDS flow
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