Senior ASIC Physical Verification Specialist
2 weeks ago
At Micron Semiconductor Asia Operations Pte. Ltd, we are dedicated to transforming the world of information storage and processing. Our cutting-edge memory and storage solutions are designed to accelerate innovation, fueling advancements in artificial intelligence, 5G applications, and more.
About the RoleWe are seeking an exceptional Principal Engineer I - ASIC Physical Verification to join our team. As a key member of our design verification team, you will be responsible for ensuring the accuracy and integrity of our advanced semiconductor designs.
Key Responsibilities- Responsible for Block/Chip Tile PV closure to achieve optimal Performance, Power, and Area (PPA) metrics.
- DRC & LVS closure for Block and Full Chip for complex hierarchical Designs in 5nm/3nm nodes.
- Interaction with IR, IP, ESD & PD teams for Physical Verification Convergence & Resolving Conflicts.
- Able to work on multiple blocks at same time with minimal supervision.
- Responsible for Full Chip LVS & DRC closure.
- Responsible for Analog integration closure for all IP's used in SOC.
- Interactions with Foundry team for Full chip Tapeout.
Requirements
- 8-14 years of relevant experience in ASIC Physical Verification.
- Good understanding of overall design Flow from RTL to GDS.
- Hands-on Experience on Physical Verification closure of full chip & Hierarchical Designs.
- Hands-on DRC & LVS Experience on Lower node Technologies with Synopsys/Siemens Tools.
- Good knowledge on PnR flow.
- Knowledge on Perl/TCL/Python scripting language.
- Experience on multi-voltage designs.
- Good understanding of all Phases of Physical Design (PnR/STA/PV/IR).
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