Senior ASIC System on Chip
4 days ago
We are seeking an experienced ASIC SoC Design Engineer to join our team. In this role, you will be responsible for contributing to sub-system and chip-level integration activities, including task planning, holding code and design reviews, and contributing to sub-system/chip-level integration.
You will interact closely with the architecture team and develop implementation strategies to meet quality, schedule, and power performance area for sub-system/chip-level integration.
Additionally, you will work with the cross-functional team of verification, design for test, physical design, emulation, and software teams to make design decisions and represent project status throughout the development process.
Key Qualifications- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- At least 3 years of experience in RTL coding using Verilog or Systemverilog language.
- Experience in high-performance design, multi-power domains with clocking.
- Experience with multiple SoCs with silicon success.
- Experience with ASIC design methodologies for front-end quality checks.
- Domain knowledge of one or more of the following: Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, PinMux.
- Understanding of cross-domain involving domain validation, design for testing, physical design, and software.
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