Lead Memory Design Engineer

2 weeks ago


Kota, Rajasthan, India beBeeMemory Full time ₹ 2,00,00,000 - ₹ 2,80,00,000

**Memory Design Engineer Role Summary:**

We are seeking a highly skilled Memory Design Engineer to join our team. The ideal candidate will have expertise in designing and developing custom memory architectures, characterization, layout design, net-listers, and SRAM design verification at the compiler level.

**Key Responsibilities:

  • Design and develop full-custom memory architectures, layouts, and net-listers
  • Perform SRAM design verification at the compiler level, covering both design and layout
  • Populate and publish execution plans, design quality plans, and DFMEA reports
  • Monitor project health and report any risks and mitigation strategies
  • Collaborate with cross-functional teams to ensure successful project delivery

**Requirements and Qualifications:

  • 8+ years of experience in full-custom memory design and architecture
  • Hands-on experience with SRAM leafcell GDS from scratch to top-level integration
  • Expertise in working on memory layout design for advanced nodes (TSMC: 7nm/5nm/3nm)
  • Proficient in various physical verification flow debug tools (DRC, LVS, DFM, PERC, ERC, EM, IR)
  • Experience with Cadence Virtuoso layout editor and Caliber Physical Verification Flow
  • Synopsys Custom Compiler experience is a plus
  • Understanding of good layout practices in lower process nodes like 7nm and 5nm

**Preferred Skills and Additional Experience:

  • FinFET architecture and challenges such as variability and manufacturability
  • Address process-dependent effects like electro-migration (EM), IR drop
  • Optimizing layouts for yield enhancement and manufacturing robustness
  • Debugging silicon failures and identifying layout-related issues


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