IO Layout Design Expert for Bulk CMOS and FINFET Nodes

2 days ago


Bengaluru, Karnataka, India DigiNhance pvt ltd Full time
About the Role

DigiNhance pvt ltd is seeking an experienced IO Pad Layout Engineer to join our team. This role involves designing and implementing high-quality IO layouts for Bulk CMOS and FINFET nodes.

As an IO Pad Layout Engineer, you will be responsible for working on complex IO layout designs, ensuring compliance with industry standards and best practices. Your expertise in using industry-standard tools like Cadence Virtuoso and Calibre will be essential in delivering high-performance IO pads.

The ideal candidate will have a strong background in digital design, with experience in working on IO layouts for Bulk CMOS and FINFET nodes. You should be well-versed in CMOS logic, GPIO blocks, transmitters, and receivers. Additionally, your ability to debug layout issues independently and work as part of a team will be valuable assets.

Key Responsibilities
  • Design and implement high-quality IO layouts for Bulk CMOS and FINFET nodes
  • Work on complex IO layout designs, ensuring compliance with industry standards and best practices
  • Collaborate with cross-functional teams to ensure successful project delivery
  • Develop and maintain knowledge of industry-standard tools like Cadence Virtuoso and Calibre
Requirements
  • Minimum 2+ years of experience in digital design, preferably with a focus on IO layouts
  • Strong background in CMOS logic, GPIO blocks, transmitters, and receivers
  • Excellent debugging skills, with the ability to resolve complex layout issues independently
  • Experience working as part of a team, with excellent communication and collaboration skills
  • Proficiency in scripting languages, such as SKILL or other programming languages

Estimated Salary: $120,000 - $180,000 per annum

DigiNhance pvt ltd offers a comprehensive compensation package, including a competitive salary, benefits, and opportunities for professional growth and development.



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