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Principal IO Layout Designer
1 month ago
At UST Global, we are seeking an experienced IO Layout Designer to join our team. The ideal candidate will have hands-on expertise in IO block-level and module-level layout design, as well as experience with FinFET technologies and advanced verification platforms.
Key Responsibilities:
- Design, develop, and verify IO blocks, with a focus on reliability and manufacturability.
- Perform block-level and full-module IO layout design with attention to detail and layout optimization.
- Develop IOs from scratch, including floor planning, power bus design, ESD protection, and PAD cell integration.
- Utilize Calibre and PVS platforms to perform DRC, LVS, and other verification processes to ensure design compliance.
Requirements:
- Bachelor's or Master's degree in Electrical Engineering, Electronics, or a related field.
- 5+ years of experience in IO layout design, with a focus on block-level and full-module design.
- Proven experience in developing IOs from scratch, including floor planning, power bus design, ESD protection, and PAD cell layout.
- Hands-on experience with Calibre and PVS verification platforms.
- Solid understanding of IC fabrication processes, layout design fundamentals, and IO reliability issues.
- Familiarity with FinFET technologies is highly preferred.
Working at UST Global:
At UST Global, we offer a collaborative and innovative work environment with opportunities for professional growth. As part of our team, you'll work on pioneering projects that make a meaningful impact in technology, helping us build solutions that shape the future.
