
Chief Verification Architect
4 days ago
We are seeking a highly skilled and experienced Senior Design Verification Engineer to join our team.
About the Role:The Senior Design Verification Engineer will be responsible for defining verification methodologies, implementing verification plans, and participating in the design verification and bring-up of System-on-Chip (SoC) devices. This includes writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test benches, and test harnesses.
Key Responsibilities:- Develop and implement verification methodologies for SoC devices
- Participate in design verification and bring-up activities
- Write and maintain test cases, test benches, and test harnesses
- Collaborate with multi-disciplinary teams to develop and integrate SoC devices
- Bachelor's or Master's degree in Electrical and Electronics Engineering (EEE) or Electrical and Computer Engineering (ECE)
- 8+ years of experience in semiconductor design verification
- Experience with System Verilog, Universal Verification Methodology (UVM), GLS, assertions, and coverage-driven verification
- Proficiency in multiple verification platforms, including UVM test bench, emulator, and software environments
- Experience with industry-standard IO interfaces, such as AMBA, CXL, USB, MIPI, PCIe, and DDR
- Strong debug skills and experience identifying bugs in architecture, functionality, and performance
- Experience verifying at multiple levels of logic from SoCs to full system testing
- Experience with industry-standard tools and scripting languages, such as Python
- Experience in SOC Architecture and ARM/RISCV
- Excellent verbal and written communication skills
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