Chief Digital Verification Engineer

SOC RTL Design Verification Experience : 4 to 10 Years Development and verification of post-si validation sequences using C/C++• Experienced with Verilog, System Verilog, and C or C++• Candidate past experience requirements, • Should have experience in system-level Verification. • DDR prior experience is not mandatory. ACL Digital, a leader in...

Formal Verification Engineer Experience : 4 to 12 Years Automate formal flows using scripting (Python, Perl, or Tcl). Document verification plans, results, and sign-off reports. ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise...

We are seeking a highly skilled and experienced Verification Engineer to join our team. As a key member of our verification group, you will play a critical role in the development and execution of our digital protocols.About the RoleIn this challenging and rewarding role, you will be responsible for designing and implementing verification plans, creating and...

Hi, Greetings from ACL Digital, Looking for CPU Verification Engineers Exp level: 4+years Location: Banglore Job Description: We are seeking a skilled and motivated CPU Verification Engineer to join our microprocessor verification team. In this role, you will contribute to the verification of high-performance, low-power CPU cores by developing scalable...

NoC Verification EngineerExperience: 7 to 14 YearsKey Responsibilities:Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...

Lead Functional Verification EngineerExperience: 6+ YearsLocation: BangaloreJob Description:Lead verification activities for complex CPU cores, memory subsystems, and high-speed PCIe IPs.Define verification strategy, test plan, and coverage goals based on architecture and spec reviews.Build and maintain advanced UVM-based testbenches for block and...

Lead Functional Verification Engineer Experience: 6+ Years Location: Bangalore Job Description: Lead verification activities for complex CPU cores, memory subsystems, and high-speed PCIe IPs. Define verification strategy, test plan, and coverage goals based on architecture and spec reviews. Build and maintain advanced UVM-based testbenches for block and...

NoC Verification EngineerExperience : 7 to 14 YearsKey Responsibilities:Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...

NoC Verification Engineer Experience: 7 to 14 Years Key Responsibilities: Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe,...

Job Description:Looking for an experienced Design Verification Engineer to develop and execute verification plans for digital designs (ASIC/FPGA/SoC). Responsible for writing testbenches, creating test cases using SystemVerilog/UVM, running simulations, and debugging design issues. Collaborate with design teams to ensure design quality and coverage...