Senior Technical Lead

2 days ago

Thoothukudi, Tamil Nadu, India beBeeDigital Full time ₹ 1,20,00,000 - ₹ 2,00,00,000

Job Title: Lead DFT Engineer

  • We are looking for a highly skilled technical leader to drive Digital Full Test (DFT) architecture, planning, and implementation across complex System-on-Chip (SoC)/Application-Specific Integrated Circuit (ASIC) designs.

We seek an expert in DFT who can mentor junior engineers, collaborate with cross-functional teams, and ensure world-class testability and manufacturability of silicon products.

The ideal candidate will have experience defining and driving DFT strategy and architecture for multiple ASIC/SoC projects. They will lead the implementation and verification of various DFT features such as scan insertion and compression, ATPG pattern generation and fault grading, MBIST and Logic BIST insertion and validation, boundary scan, and IJTAG.

The role requires strong knowledge of RTL design, Static Timing Analysis (STA), and synthesis flows. Proficiency in scripting languages (Python, Perl, Tcl) for flow automation is also essential.

Key Responsibilities:

  • Define and drive DFT strategy and architecture for multiple ASIC/SoC projects.
  • Lead implementation and verification of DFT features like scan insertion and compression, ATPG pattern generation and fault grading, MBIST and Logic BIST insertion and validation, boundary scan, and IJTAG.
  • Mentor and guide junior DFT engineers; conduct design reviews and training sessions.
  • Develop and maintain DFT automation scripts and infrastructure.

Required Skills and Qualifications:

  • Bachelor's or Master's degree in Electronics, Electrical, or VLSI Design.
  • 7+ years of experience in DFT for complex ASIC or SoC designs.
  • Expertise in scan insertion, compression, ATPG, MBIST, and boundary scan.
  • Hands-on experience with DFT tools such as Synopsys: DFT Compiler, TetraMAX, TestMAX, Siemens EDA: Tessent ScanPro, MBIST, IJTAG, Cadence/others: Modus, Encounter Test.
  • Strong knowledge of RTL design, STA, and synthesis flows.
  • Proficient in scripting languages (Python, Perl, Tcl) for flow automation.

Benefits:

  • Competitive salary.
  • Leadership exposure.
  • Fast-track growth opportunities.

Why Choose This Opportunity?

  • Lead DFT for high-performance, next-gen SoCs and ASICs.
  • Collaborate with top-tier engineers and global semiconductor leaders.

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