Senior VLSI Front-End Design Verification Professional

2 weeks ago


Hyderabad, Telangana, India Coders Brain Technology Private Limited Full time

Coders Brain Technology Private Limited is seeking a talented VLSI Front-End Design Verification Engineer with a strong background in SystemVerilog (SV) and UVM-based verification methodologies. This role comes with a competitive salary of ₹18,00,000 per annum.

About the Role:

The successful candidate will be responsible for executing front-end design verification using SystemVerilog (SV) and UVM frameworks, and developing verification environments and test plans. A strong understanding of verification methodologies and protocols is essential for this role.

Key Responsibilities:

  • Execute front-end design verification using SystemVerilog (SV) and UVM frameworks.
  • Develop and implement verification plans, test cases, and testbenches to meet project requirements.
  • Collaborate with design and architecture teams to ensure verification coverage and identify design bottlenecks.
  • Drive innovations in verification processes and methodologies for improved efficiency and quality.

Requirements:

  • 5+ years of experience in VLSI front-end design verification.
  • Expertise in SystemVerilog (SV) and UVM-based verification methodologies.
  • Strong analytical and problem-solving skills.

What We Offer:

  • A highly competitive salary of ₹18,00,000 per annum.
  • A comprehensive benefits package including medical insurance, retirement savings plan, and paid time off.
  • Opportunities for career growth and professional development.


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