Memory Layout Architect

20 hours ago

Noida, Uttar Pradesh, India beBeeLayout Full time ₹ 25,00,000 - ₹ 30,00,000

As a Memory Layout Architect, you will play a crucial role in the development and verification of memory compiler layouts.

Your primary responsibilities will include:

  • Designing and developing memory block layouts such as Array, Row/Column decoder, sense amplifier, pre-charge, and control blocks for SRAM.
  • Performing layout verification like LVS/DRC/Latchup, quality check, and documentation.
  • Collaborating with engineering teams to ensure timely delivery of block-level layouts meeting project milestones.
Qualifications and Skills:
  • Familiarity with various levels of memory layouts from custom memory bits to leaf cells, control blocks, Read-Write, Sense Amplifiers, decoders.
  • Expertise in floor planning, power planning, block area estimation of memory designs or compilers.
  • Ability to perform leaf cell layout development and physical verification.
  • Adequate knowledge of schematics, interface with circuit designers, CAD tools, and process development teams.
  • Good understanding of layout fundamentals including Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.
  • Experience with Cadence tools, Virtuoso schematic editor, Virtuoso layout L, XL & Verification tools like Mentor Calibre, Proficient in Device Matching, Parasitic Analysis, Electron Migration, and Isolation Techniques.
  • Leadership qualities and ability to multitask as required.
Benefits and Opportunities:
  • This role offers excellent opportunities for growth and professional development in a dynamic team environment.
  • You will have the chance to work on cutting-edge projects and collaborate with experienced professionals in the field.

The ideal candidate should possess strong problem-solving skills, excellent verbal and written communication skills, and be self-motivated and goal-oriented.

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