
High Performance IC Design Specialist
2 days ago
Design and develop high-performance, low-latency IP blocks for ARM Neoverse SoCs, integrating CMN fabric for cache coherence and interconnect.
Key Responsibilities- Design and integrate CMN-700/S3 fabric into AI/HPC workloads.
- Develop Verilog/SystemVerilog RTL for optimized performance and scalability.
- Configure CMN topologies using Arm Socrates for bandwidth, latency, and power efficiency.
- Implement protocols like AMBA CHI, ACE, CXL, PCIe for coherent interconnects.
- Collaborate with the Design Verification team to ensure synthesis, timing closure, and FPGA prototyping.
- Education: BS/MS/PhD in Electronics/Computer Engineering.
- Experience: 10+ years in ASIC/FPGA IP/RTL design, 5+ years with ARM Neoverse and CMN fabrics.
- Skills:
- Expert in Verilog/SystemVerilog RTL design.
- Deep knowledge of ARM Neoverse (V1/V3/N2/N3) and CMN interconnects.
- Proficiency in AMBA CHI, CXL, PCIe, or CCIX protocols.
- Familiarity with synthesis and timing tools.
- Strong problem-solving and collaboration skills.
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