Senior Verification Engineer
2 weeks ago
At Infineon Technologies, we seek an experienced Verification Engineer to join our team as a Staff Engineer Functional Verification. This role is ideal for a professional with a strong background in functional verification, particularly in the area of digital verification and formal verification.
Key Responsibilities:
- Collaborate with cross-functional teams to drive the development of new verification methodologies and strategies.
- Design and develop verification environments for ICs using the Universal Verification Methodology (UVM).
- Implement test scenarios using SystemVerilog and verify functionality using a Constrained Random Approach.
- Apply formal verification techniques to identify and fix bugs in digital and mixed-signal ICs.
- Work closely with development teams to integrate verification results into the design system and support implementation in new products.
Requirements:
- Master's degree in Electrical Engineering, Computer Science, or a related field.
- At least five years of professional experience in metric-driven verification and formal verification.
- Experience with microcontroller-based ICs and familiarity with security and safety requirements.
- Strong understanding of UVM and UPF, with experience in creating and disseminating verification methodologies.
- Familiarity with firmware and RTL design (VHDL), with experience in Cadence verification software a plus.
This is an excellent opportunity for a skilled verification engineer to take on a leadership role and drive the development of new verification strategies and methodologies at Infineon Technologies.
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