
Optimizing Memory Architectures
5 days ago
We are seeking a skilled Memory Layout Designer to join our team. The ideal candidate will have expertise in physical layout design of memory components such as SRAM, ROM, Register Files, or custom memory IPs.
The Memory Layout Designer will be responsible for delivering high-quality, DRC/LVS-clean layouts optimized for performance, area, and power. Key responsibilities include:
- Designing full-custom layouts for memory components like SRAM, ROM, CAM, Register Files, or sense amplifiers.
- Collaborating with circuit designers to understand schematics and translate them into optimized layouts.
- Floorplanning, transistor-level placement, routing, and matching to meet electrical and physical design constraints.
- Running physical verification (DRC, LVS, ERC, antenna checks) using industry-standard tools.
- Performing parasitic extraction (PEX) and assisting in post-layout simulation.
- Ensuring layouts meet design rules for process technologies (e.g., 5nm, 7nm, 16nm, 28nm).
- Implementing design automation using SKILL, Python, or Tcl where applicable.
- Working with cross-functional teams (circuit, verification, CAD) to meet project milestones.
To be successful in this role, the Memory Layout Designer should possess the following skills and qualifications:
- B.E/B.Tech or M.E/M.Tech in Electronics or Electrical Engineering.
- 3 years of hands-on experience in custom layout design, preferably in memory design.
- Strong understanding of CMOS layout techniques, matching, shielding, and electromigration.
- Experience with:
- Tools: Cadence Virtuoso, Calibre DRC/LVS, StarRC, ICC, QRC.
- Technologies: Advanced FinFET and planar nodes (28nm and below).
- Deep understanding of design rules (DRC), LVS, and physical verification sign-off flows.
- Excellent attention to detail, layout quality, and debugging skills.
As a member of our team, you can expect:
- Competitive salary.
- Performance bonuses.
- Long-term growth opportunities.
We offer:
- A chance to work on next-generation memory designs for AI, mobile, and high-performance computing chips.
- Access to leading-edge nodes and tools.
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