Senior Digital Memory Architect

2 days ago

Lucknow, Uttar Pradesh, India beBeeLayoutEngineer Full time ₹ 1,20,00,000 - ₹ 2,00,00,000
Memory Layout Engineer Position Overview

This is a highly specialized position that requires expertise in memory compilers layouts and memory Fast Cache instances layouts for next-generation Cores.

Key Responsibilities:
  • Develop high-performance memory compilers layouts and memory Fast Cache instances layouts for cutting-edge Cores.
  • Collaborate with cross-functional teams to design, implement, and optimize innovative memory layouts.
  • Ensure strict adherence to quality standards and review schematics with engineering teams.
Requirements and Qualifications:
  • Postgraduate degree in Electronic Engineering or equivalent field.
  • In-depth understanding of CMOS Transistors, their behaviors, and CMOS logic design and layout principles.
  • Understanding of power versus performance versus area trade-offs in typical CMOS design methodologies.
  • Minimum 5 years of experience in SRAM / memory layouts creation, backend verifications, including EMIR analysis, and optimization techniques.
Preferred Skills:
  • Basic knowledge of scripting languages, e.g., Perl/Python.
  • Experience working on Cadence or Synopsys flows and toolchains.

We are seeking a Memory Layout Engineer to join our team. If you have the necessary skills and qualifications, we encourage you to apply.

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