
Senior Verification Architect
2 weeks ago
Job Title: Senior Verification Architect
This role oversees the development of verification environments from scratch. The ideal candidate will create test plans and implement a top-down design verification flow in collaboration with design and architecture teams.
Key Responsibilities:- Developing DV methodology, flow development, test plan creation, and execution
- Collaborating with design, architecture, system validation, and software teams for chip verification
- Creating DV testing plans, proposing suitable DV strategies, building test platforms, developing test cases, and ensuring the quality of verification with coverage tools
- At least 10 years of experience in designing a test environment from scratch, including understanding specifications, creating comprehensive test plans, architecting top-level testbenches, and associated environments
- Expertise with verification tools (e.g., Verilog, SystemVerilog, UVM, OVM)
- Experience in standards-based verification (MIPI, USB3, Ethernet) is preferred
- Able to develop a verification strategy for new devices without legacy references
- 100% hands-on and motivated to contribute towards exciting opportunities to build industry-first products
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