
Test Design Engineer
9 hours ago
We are seeking a skilled Test Design Engineer to join our team.
- Key Responsibilities:
- Design and implement DFT architectures for complex SoCs.
- Evaluate, deploy, and optimize DFT tool flows with EDA vendors.
- Automate repetitive tasks using scripting to improve efficiency and reduce errors.
- Support test vector generation and validation for ATE.
- Provide technical guidance and mentorship to junior engineers in the DFT team.
Required Expertise:
- DFT architectures and methodologies including scan insertion & verification, ATPG, MBIST, JTAG / boundary scan.
Familiarity with Industry Tools:
- Cadence, Synopsys, and Mentor Graphics (Siemens EDA).
Languages Proficiency:
- Python, Perl, TCL.
Preferred Skills:
- Knowledge of low-power DFT techniques (power-aware ATPG, retention flops, etc.).
- Experience with post-silicon bring-up and ATE patterns.
- Familiarity with safety-critical standards (ISO 26262, DO-254, etc.).
- Exposure to High-Speed IO testing (SERDES, DDR, etc.).
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