
Design Validation Expert
3 days ago
Job Overview
Key Responsibilities:- We are seeking a highly skilled Verification Engineer to lead verification efforts and ensure first silicon success.
- This role involves verifying IPs and SoCs, managing and mentoring a team of engineers, and driving verification strategy.
- The ideal candidate will have experience in defining verification strategy, writing test plans, developing efficient test benches and test cases using the latest industry standard methodologies and HVLs.
Responsibilities include leading verification efforts, managing and mentoring a team of IP and SoC verification engineers, ensuring high-quality verification through code coverage, functional coverage, and assertions, performing Gate-Level Simulations (GLS) and Low Power Verification, collaborating with design, architecture, and validation teams, providing regular updates and technical guidance to stakeholders, automating verification tasks using scripting languages like Python, Perl, Shell, and Tcl, utilizing industry-standard tools for emulation, LEC, and AMS verification.
We are looking for a Verification Engineer who can develop and maintain reusable testbenches and test cases, define test plans and verification methodologies using UVM/OVM, work closely with cross-functional teams, provide regular updates and technical guidance to stakeholders, automate verification tasks, utilize industry-standard tools, and collaborate on verification activities.
Requirements:
- Primary Skills: Verilog, SV, UVM/OVM, IP Verification, SoC Verification, scripting – Perl, Python, Shell, and Tcl.
- Secondary Skills: Test bench / model / VIP development, Functional coverage, GLS, LEC, Emulation, AMS, ARM, Protocols AHB/AXI/APB, Ethernet, USB, PCIe, I2C, SPI, CAN, Mipi CSI/DSI, LPDDR.
Education Qualification:
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
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