
Lead Designer: Physical Design Engineers Wanted
3 days ago
We are seeking a skilled Physical Design Engineer to join our organization. This hands-on technical position will provide opportunities to work on a variety of challenging designs.
Critical to this position is the ability to articulate technical discussions with ASIC Customers and design teams, as well as work closely with customer, frontend and integration teams to ensure successful tape outs.
Primary Responsibilities:
- Pre-layout Static Timing Analysis (STA) to ascertain feasibility, timing constraint validation and feedback to customers and design teams
- Chip/Block Level Floorplanning and pin assignment
- Review top-level/block-level clock specifications for completeness and feasibility
- Handle all the Physical design tasks (Placement, Routing)
- Perform sign-off tasks (RC Extraction, Static Timing Analysis, IR drop analysis and Physical Verification)
- Presentation and Customer Interaction in customer meetings
Necessary Qualifications:
- Bachelor of Science in Electrical Engineering or equivalent experience, with 10+ years of experience required
- Experience in ASIC Physical Design; Experience in an SoC product development organization with tapeouts at 28nm/16nm design nodes
- Hands-on Experience with implementing Electronic Design Automation (EDA) tools like ICC2/Innovus
- Scripting skills in Perl/Tcl/Python required
- Good understanding of ASIC frontend design
- Experience in both Flat and Hierarchical layouts
- Strong problem-solving skills and ability to analyze and resolve physical design issues related to library, timing constraints or CAD tools required
- Experience with power analysis and IR-drop tools (primepower/Redhawk) and Static Timing Analysis (Primetime)
- Expert handling of Verilog HDL based Netlists, Physical design libraries
- Team player with good interpersonal and communication skills
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