Lead Physical Design engineer
3 weeks ago
Position: Lead Physical Design engineer
Experience: 8 to 10 Years
Location: Bangalore
Notice Period: Immediate to 30 Days
Job Description – Physical Design Engineer
Role Overview:
We are looking for a highly skilled Lead Physical Design Engineer with hands-on experience in high-frequency SoC designs, specifically in DDR and advanced node technologies. The ideal candidate will be responsible for the complete RTL to GDSII implementation flow.
Key Responsibilities:
- Full flow ownership from RTL to GDSII
- Floorplanning, power planning, placement, CTS, routing using Cadence Innovus
- Block and top-level PnR for high-frequency designs
- Physical verification (LVS/DRC) and fixing
- Timing closure using STA (Static Timing Analysis)
- EMIR and IR drop analysis
- Design optimization for performance, power, and area
- Collaboration with RTL, DFT, and verification teams
- Signoff with industry-standard tools and methodologies
Key Skills Required:
- Strong experience with #DDR interfaces and high-frequency digital designs
- Expertise in Cadence Innovus physical implementation tool
- Hands-on experience with STA, EMIR, and IR drop analysis
- Good knowledge of Synthesis and Floorplanning
- Experience with advanced technology nodes (e.g., 7nm, 5nm) is a plus
- Excellent problem-solving and debugging skills
- Strong communication and collaboration abilities
This is your chance to be part of innovative semiconductor product development with a talented team at ACL Digital. If you meet the above requirements and are looking for your next challenge — we'd love to connect
Send your resume to: vaishnavi.suvarna@acldigital.com
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