
Senior ASIC Design Expert
7 days ago
MosChip is a leading semiconductor and embedded system design company, specializing in Embedded, Turnkey ASICs, Mixed Signal IP, Semiconductor & Product Engineering, and IoT solutions for various industries.
We are seeking an experienced Physical Design Engineer to join our team as a senior level professional. The successful candidate will have extensive experience with 65nm or lower node designs, including low power techniques such as Voltage Islands, Power Gating, and substrate-bias.
- Top-level floor planning and partitioning
- Placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, and timing analysis/closure
- ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks
The ideal candidate will provide technical guidance and mentoring to junior physical design engineers and interface with front-end ASIC teams to resolve issues.
Main Responsibilities:
- Low Power Design - Voltage Islands, Power Gating, Substrate-bias techniques
- Timing closure on DDR2/DDR3/PCIE interfaces
- Excellent communication skills
Requirements:
- Strong background in ASIC Physical Design: Floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure
- Extensive experience and detailed knowledge in Cadence or Synopsys or Magma physical Design Tools
- Expertise in scripting languages such as PERL, TCL
- Strong Physical Verification skill set
- Static Timing Analysis in Primetime or Primetime-SI
- Good written and oral communication skills
Benefits Package:
- A dynamic work environment with opportunities for growth and development
- A competitive salary and benefits package
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