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Digital Design Engineer
1 week ago
About the Role:
We are seeking a highly skilled Digital Design Engineer to join our team in test development. As a Senior DFT Engineer, you will be responsible for developing and implementing DFT solutions for complex SOC designs.
Key Responsibilities:
- Design and implement defect modeling and test methodologies for advanced process nodes
- Perform top/block-level DFT insertion including scan compression, boundary scan, ATPG, and pattern simulation
- Develop and verify DFT circuitry and interface with other blocks, debug timing simulation issues
- Closely work with physical design teams to generate and validate timing constraints
- Quickly understand problem statements and innovate solutions for DFT, diagnosis, and yield learning
Requirements:
- Bachelor's/Master's/PhD in Electrical or Computer Engineering
- 4-8 years of hands-on experience with DFT and test flow using commercial EDA tools for large and complex SOCs
- Strong fundamental knowledge of DFT techniques including JTAG, ATPG, yield learning, logic diagnosis, scan compression, IEEE 1500 Std., and MBIST
- Experience with Cadence & Synopsys DFT tools is required
- Strong programming skills in Perl/TCL/C++ and shell scripting is required
- Must be able to solve complex problems and independently drive tasks to completion in a timely manner