Senior Verification Engineer

4 days ago


Kannur, Kerala, India beBeeEngineering Full time ₹ 20,00,000 - ₹ 25,00,000
Verification Engineering Role

Key Responsibilities:

  • Lead the development of verification strategies for analog/mixed-signal IPs and SoCs.
  • Develop and maintain SystemVerilog, Verilog-AMS, or UVM-based verification environments.
  • Collaborate with analog designers to create AMS behavioral models for early integration and verification.
  • Debug complex AMS simulation issues across multiple abstraction levels.
  • Drive coverage analysis and sign-off using functional, formal, and assertion-based methods.

Job Requirements:

  • Minimum 8+ years of hands-on experience in AMS verification.
  • Proven track record in building verification environments using SystemVerilog, Verilog-AMS, or UVM.
  • Strong background in mixed-signal simulation and behavioral modeling.

Qualifications:

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

Location:

Multiple locations: Bangalore, Hyderabad, Ahmedabad, and Noida.

Duration:

Long-term employment opportunity.



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