
Senior RTL Designer
7 hours ago
As a respected leader in the field of semiconductor design, we are seeking experienced professionals to join our team as design engineers and verification engineers.
We are looking for individuals with 5+ years of experience in ASIC/IP Design, specifically in Logic design/RTL design, IP design and integration, and the use of tools such as Lint and CDC.
- Experience with RTL ASIC is a must.
- Knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture is highly desirable.
The ideal candidate will also have experience in Synthesis/Understanding of timing concepts, as well as knowledge of High Speed Serial Interfaces such as PCIe Gen 3/4 or USB or MIPI, Memory Interfaces such as DDR or HBM I/O, and SOC Interfaces such as GPIO, SPI, I2C, UART (3+).
Verification Engineer Requirements- IP verification using SV/UVM
- SOC verification using C/SV
- Third Party VIP Integration
- Interconnect Protocols: AHB, AXI, APB
- SOC Interfaces: GPIO, SPI, I2C, UART (3+)
- High Speed Serial Interfaces: PCIe Gen 3/4 or USB or MIPI (7+)
- Memory Interfaces: DDR or HBM I/O (10+)
- Coverage Closure: Code, Functional and Toggle
- Tools: Synopsys VCS or Cadence Incsive
- Technical Documentation: Testbench Specification, Test Plan Specification
- Foundry Porting Experience: Technology Library Conversion Related Changes Verification
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