Senior Expert Static Timing Analysis Engineer

5 days ago


Bengaluru, Karnataka, India beBeeStaticTimingAnalysis Full time ₹ 30,00,000 - ₹ 50,00,000

Job Summary:

We are seeking a seasoned professional with expertise in Static Timing Analysis (STA) and Synopsys Design Constraints (SDC). The ideal candidate will have strong background in RTL, System Verilog, Perl, Tcl, or Python scripting, as well as experience with front-end EDA design methodologies and logic synthesis tools.

About the Role:
  • Collaborate with customers to ensure our SDC Constraints solution meets their expectations.
  • Develop and integrate design methodologies with other Synopsys products.
  • Track customer engagements and communicate status with internal stakeholders.
  • Prepare and deliver technical presentations to customers and Field Application Engineers (FAEs).
  • Create customer training material related to our SDC Constraints solution.
  • Routinely meet with customers to understand their key priorities and communicate these internally.
  • Provide technical direction to our R&D team and champion key customer requests.
The Impact You Will Have:
  • Enhance customer satisfaction by ensuring our solutions meet their needs and expectations.
  • Drive the integration of our SDC Constraints solution with other Synopsys products, enhancing overall product offerings.
  • Improve communication and collaboration between customers, marketing, and upper management.
  • Empower customers and FAEs with comprehensive technical knowledge through effective presentations and training materials.
  • Influence product development by providing valuable insights and priorities from customer feedback.
  • Ensure the continuous improvement and innovation of our SDC Constraints solution.
Requirements:
  • Proficiency with STA, SDC, RTL, and System Verilog.
  • Strong understanding of front-end EDA design methodologies.
  • Strong Perl, Tcl, or Python scripting skills.
  • Prior experience with logic synthesis tools.
  • Prior experience using or supporting SDC tools.
  • Prior experience with RTL simulation and SVA.
  • Solid communication skills, both verbal and written.
  • Ability to produce detailed product requirement documents.
  • Bachelor's degree in Electrical or Computer Engineering with 10+ years of experience in STA/Synthesis/Front-End Flows.


  • Bengaluru, Karnataka, India beBeeStaticAnalysis Full time ₹ 1,00,00,000 - ₹ 2,00,00,000

    Job Title: Static Time Analysis EngineerJob Overview:We are seeking a highly skilled Static Time Analysis (STA) expert to join our team. As a STA engineer, you will play a critical role in ensuring the timely closure of complex designs.Main Responsibilities:Timing Analysis & Closure:Perform setup, hold, and skew analysis across Full-Chip, Sub-system, and IP...


  • Bengaluru, Karnataka, India Cloudious Full time

    Job Title Static Timing Analysis Lead Location Bengaluru India Experience 7 18 years Industry Semiconductors AI Networking ASIC Design Role Overview We re looking for an experienced and driven Static Timing Analysis STA and Timing Signoff Methodology lead In this role you ll be the expert responsible for defining developing and...


  • Bengaluru, Karnataka, India beBeeTiming Full time ₹ 25,00,000 - ₹ 35,00,000

    We are seeking a seasoned Static Timing Analysis (STA) expert to join our dynamic team.Key ResponsibilitiesDevelop and maintain in-depth expertise in STA tools and methodologies.Collaborate with cross-functional teams to ensure timely project delivery.Analyze and resolve complex timing-related issues.Provide technical guidance and support to junior...


  • Bengaluru, Karnataka, India beBeeTiming Full time ₹ 9,00,000 - ₹ 12,00,000

    Job OpportunityWe are seeking an experienced Static Timing Analysis Engineer to join our team.Responsibilities:Develop and implement timing closure strategies for high-frequency designs.Collaborate with the Front-End (FE) team to develop and refine design constraints.Work closely with partition owners to implement timing ECOs.Stay up-to-date with advanced...


  • Bengaluru, Karnataka, India beBeeHardware Full time ₹ 2,00,00,000 - ₹ 2,50,00,000

    Electronics EngineerWe are seeking a skilled Electronics Engineer to join our team. As a key member of the engineering team, you will be responsible for planning, designing, and optimizing electronic systems, as well as testing and verifying their functionality.5 to 10 years of experience in static timing analysis, constraints, and other physical...


  • Bengaluru, Karnataka, India beBeeTiming Full time ₹ 15,00,000 - ₹ 30,00,000

    We are seeking a seasoned expert in Static Timing Analysis to spearhead our ASIC and SoC design verification efforts. As a key member of our engineering team, you will play a pivotal role in ensuring the timing closure and verification of complex digital designs.Key ResponsibilitiesYou will be responsible for full-chip and block-level timing closure across...


  • Bengaluru, Karnataka, India Fiori Technology Solutions Inc Full time ₹ 15,00,000 - ₹ 20,00,000 per year

    We are seeking an experienced Lead STA Engineer to take ownership of the static timing closure process for complex ASIC/SoC designs. In this role, you will lead timing sign-off activities, coordinate with cross-functional teams, and ensure designs meet performance, power, and area targets while achieving first-pass silicon success.Key Responsibilities:Own...


  • Bengaluru, Karnataka, India Fiori Technology Solutions Inc Full time ₹ 15,00,000 - ₹ 20,00,000 per year

    We are seeking an experienced Lead STA Engineer to take ownership of the static timing closure process for complex ASIC/SoC designs. In this role, you will lead timing sign-off activities, coordinate with cross-functional teams, and ensure designs meet performance, power, and area targets while achieving first-pass silicon success.Key Responsibilities:Own...


  • Bengaluru, Karnataka, India beBeeDft Full time ₹ 14,00,000 - ₹ 23,10,000

    Job Title: DFT Static Timing LeadAs a seasoned digital design expert, you will be responsible for implementing and verifying complex architecture and features in NBIO IP and Subsystems.Key Responsibilities:Design and implement Scan Network and Memory BIST logic.Create and maintain DFT timing constraints to ensure successful project execution.Collaborate with...


  • Bengaluru, Karnataka, India Capgemini Engineering Full time

    Experience: 5+yearsLocation: BangaloreJob Description:As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process...