
Technical Lead
2 days ago
Job Title: Design Verification Engineer
We are looking for a skilled Design Verification Engineer to join our team. This role offers a unique opportunity to work on complex projects and collaborate with a talented group of professionals.
In this position, you will be responsible for the verification of various IPs and/or SoCs. You will implement simulation testbenches, low power simulation setup, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals.
Your ideal candidate should have 8+ years of design verification experience, MS (or higher) in EE/EC/ECE Engineering, and excellent knowledge of computer architecture and design verification fundamentals.
The responsibilities of this role include:
- Implementing simulation testbenches
- Low power simulation setup
- Assembly/C language diagnostics
- Assertion checkers or coverage monitors
Additionally, you will assist with developing test-plans, debugging failures and analyzing coverage information.
To succeed in this role, you will need:
- □ 8+ years of design verification experience
- □ MS (or higher) in EE/EC/ECE Engineering
- □ Excellent knowledge of computer architecture and design verification fundamentals
You will also need experience with Verilog, System Verilog assertions and testbench methodologies, as well as knowledge of AMBA protocol, PCIe MAC, USB MAC, Bluetooth MAC, Wifi 802.11 MAC layer protocol.
Good communication skills and hands-on experience in scripting languages like Perl, Unix shell or similar languages are essential.
Exposure to assembly language programming is desired but not mandatory.
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