
Senior Semiconductor Design Specialist
1 week ago
We are seeking an experienced Layout Engineer with a strong background in Analog Layout and leadership expertise. The ideal candidate will have at least 4+ years of experience, a Master's degree, and excellent communication skills.
This role involves designing and laying out advanced semiconductor technology, requiring expertise in mixed signal/analog/high speed layout, including Ser Des, ADC/DAC, PLL, etc. Familiarity with Cadence Virtuoso environment and industry physical verification tools (DRC, LVS, DFM, etc.) is essential. Experience in advanced technology nodes under TSMC - 32nm/28nm/16nm/14nm/7nm, preferably 5nm/3nm, is also required.
The successful candidate will have a strong knowledge of EMIR analysis, ESD, antenna, and related layout solutions. Additionally, they should be able to work in a global team and adapt to diverse areas.
Required Skills and Qualifications- Minimum 4+ years of experience in Analog Layout
- Master's degree in a relevant field
- Excellent communication and leadership skills
- Good understanding of advanced semiconductor technology process and device physics
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