PCIe IP Core Development Expert
1 week ago
Design and verify complex PCIe IP cores for high-performance semiconductor applications.
We are seeking an expert with a strong background in VLSI design to lead our team of engineers in delivering cutting-edge solutions.
- Key requirements include expertise in interconnect protocols such as PCIe, CXL, and UCIe.
- Experience with AXI, ACE, and CHI architectures is essential, particularly a deep understanding of AXI.
- A thorough knowledge of DMA usage and its application in VLSI design is required.
- Proficiency in SystemVerilog (SV) and Universal Verification Methodology (UVM) is crucial.
- Experience with standard Verification IPs (VIPs) in testbenches, preferably Synopsys, is highly desirable.
- Familiarity with perl/tcl scripting will be advantageous.
- A Bachelor's Degree in Electrical, Electronics, or Computer Engineering is mandatory.
As a Design Verification Lead, you will be responsible for leading the development and verification of complex PCIe IP cores.
The ideal candidate will have excellent leadership skills, technical expertise, and the ability to work effectively in a collaborative environment.
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